Job description:
1. Responsible for selecting solutions for digital logic devices, evaluating software and hardware resources, performance, and development tools;
2. Responsible for the FPGA/ASIC/SOC chip architecture, solution design, and software/hardware interface design of the product;
3. Responsible for RTL design and verification of key logic modules in the product;
4. Responsible for the general platform architecture and implementation in the field of digital logic technology;
5. Responsible for system integration, technical breakthroughs, problem localization, etc. of the product.
Job requirements:
1. More than 3 years of experience in FPGA/ASIC development, with at least one full participation in large-scale FPGA chip design projects and commercialization applications;
2. Familiar with chip structures, development environments, and simulation debugging tools from companies such as Altera/Xilinx/Lattice;
3. Proficient in at least one HDL language in Verilog/HDL/SystemVerilog;
4. Proficient in temporal constraints, temporal analysis, and temporal optimization methods;
5. Experience in FPGA high-speed interface development;
6. Familiar with FPGA based digital signal processing methods and implementation;
7. Familiarity with FPGA based SOC software and hardware developers is preferred.
6. Priority given to those who have developed sensors, laser ranging, TDC, and servo drivers;